Hi.

I guess Hugo meant the "couple of inverters" literally: Inverting twice results in a "buffered" input signal.
But a single inverter is sometimes handy, too. Depending on the amount of delay the inverter and/or other components introduce to the clock and data signals, it can be useful to use the inverted clock on ICs at the end of the chain: If the data signal get's shifted by more than 1/2 of a clock cycle, inverting the clock cycle can help to get in sync (well soft of) again.
Shouldn't be an issue on a 11MHz signal and todays ICs though. So I really guess that Hugo was talking about inverting the clock twice.

cu,
sven