Originally Posted By: JBjorgen
Out of curiosity, is this a specific thunderbolt chip limit, a GPU limit, or a limitation of the thunderbolt 3 spec?

It’s a part of the Thunderbolt spec per Intel. There’s 8 lanes of DisplayPort 1.2 on the bus seperate from the PCIe lanes. (TB3 also tossed in a USB 3.1 Gen2 bus seperate from the PCIe/DP bits) DisplayPort commonly uses 4 lanes for a single display stream, though 5K and some 4K monitors need all 8 lanes. Hence the 2 display limit per Thunderbolt bus (or one 5K display).