The CPU has some LCD interfacing out of the box; however, full 16-bit TFT isn't possible because LCD data lines 8-15 are multiplexed onto other GPIO lines (which we use on the empeg as GPIOs).

There is a pad-out next to the CPU which will take a 0.5mm pitch connector that can be bought from farnell - this contains all the LCD signals available, namely - Pixel clock, line clock, frame clock, AC bias (valid signal for TFT I think), and LCD D0-D7.

The VFD uses D0 only, and we run in a 4bpp mode. In theory you could add 3 slave displays to the empeg by using D1, D2 and D3 - all the other signals would be common

Hugo