The three I2S lines are all transmitted from the empeg and received at the WT32i. So each of those would need a circuit something like that to reduce the empeg's 3.3V signalling down to 2.5V or so.

So if I get this correct (unlikely with my current mental faculties, but..), the ratio we need is 2.5/3.3 == 0.75.

So the value of the rightmost resistor, divided by the sum of the left+right resistors, should be about 0.75. I would suggest choosing values that keep the total of left+right in the 5-15K range.

Get it?

The third resistor on the tap, is there as a safety, in case something goes cuckoo. It will ensure there can never be a dead short (aka. "zero ohms"), should the polarity of a GPIO pin accidentally be programmed incorrectly. I'm not sure what value to use, but 300 is a good start. smile

EDIT: Duh.. scrap that one entirely -- the first two resistors already provide oodles of current limiting. So just get rid of the 300ohm thought altogether. smile


Edited by mlord (15/12/2017 22:59)